1. Field of the Invention
The present invention relates generally to a method for manufacturing a semiconductor structure, and more particularly, to a method for manufacturing a semiconductor structure having a selectively-grown material layer on the surface of a trench.
2. Description of the Prior Art
In the present semiconductor processes, a localized oxidation isolation (LOCOS) or a shallow trench isolation (STI) is normally used to isolate the MOS transistors. However, with the reduction in both design size and fabricating line width of the semiconductor wafers, the drawbacks of pits, crystal defects and longer bird's beak in the LOCOS processes will affect even more the characteristics of the semiconductor wafers. The field oxide produced in the LOCOS processes also occupies a larger volume, which affects the integration of the semiconductor wafers. Thus, in the submicron semiconductor process, the STI process is widely used as an isolation technique because of its smaller size and improved integration potential.
The typical fabrication method of a STI is to first form shallow trenches between each MOS device on the surface of the semiconductor wafer, and a dielectric material is then filled into the shallow trenches to achieve electrical isolation function. However, as the size of the semiconductor components shrinks and gets close to their physical limitations, the corresponding decrease of the size of the trenches causes the increased difficult in filling the dielectric material into these trenches. As a result, the way about how to manufacture high performance STI has become one of the important issues in the field of manufacturing semiconductor devices.